Tuesday, March 9, 2010

JUNCTIONLESS TRANSISTORS!

From the early ages of transistors i.e. in 1940s when they were over 1 centimeter size to the modern age where transistors are less than 30 nanometers long – transistors are shrinking their size over three thousands times. The outcome is that more transistor based circuits are integrated into a single chip. But this development cannot continue for much longer. One of the increasingly difficult problems that chip designers are facing is that the high density of components packed on a chip makes interconnections increasingly difficult; and, as conventional chip structures continue to shrink, Moore's Law is on a collision course with the laws of physics.

All existing transistors are based on junctions – obtained by changing the polarity of silicon from positive to negative. It is a little bit like changing the color of silicon from black to white, explains Jean-Pierre Colinge, a professor at Tyndall National Institute, whose team has just reported a breakthrough in nanoelectronics by demonstrating the world's first junctionless transistor.

In modern transistors, a negative-positive-negative structure needs to be created, where the width of the positive region is only a few dozens of atoms wide.

In a junctionless gated transistor the doping concentration in the channel is identical to that in the source and drain. Because the gradient of the doping concentration between source and channel or drain and channel is zero, no diffusion can take place, which eliminates the need for costly ultrafast annealing techniques and allows one to fabricate devices with shorter channels.

The devices have full CMOS functionality, but they contain no junctions or doping gradients and are, therefore, much less sensitive to thermal budget issues than regular CMOS devices.

The key to fabricating a junctionless gated transistor is the formation of a semiconductor layer that is thin and narrow enough to allow for full depletion of carriers when the device is turned off. The semiconductor also needs to be heavily doped to allow for a reasonable amount of current flow when the device is turned on. Putting these two constraints together imposes the use of nanoscale dimensions and high doping concentrations.

The electrical current flows in this silicon nanowire, and the flow of current is perfectly controlled by a wedding ring structure that electrically squeezes the silicon wire. These structures are easy to fabricate even on a miniature scale which leads to the major breakthrough in potential cost reduction.

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